1. Field of Invention
This invention relates to a memory cell having a single transistor with a base-collector capacitance and more particularly to such a memory cell employing an amorphous semiconductor threshold device to charge the capacitance of the cell.
2. Description of the Prior Art
Single transistor memory cells are highly desirable because they allow greater packing density than can be achieved with semiconductor latches. The advantage of semiconductor latches is that they are relatively static while the single transistor cell must be periodically refreshed and restored. However, such semiconductor latches require at least two gates in the cell thereby increasing the area required for the cell and reducing its packing density.
A problem in the bipolar implementation of single transistor cells is that base-emitter breakdown is employed to charge the capacitance of the cell which causes the base to degrade and damages the transistor. To overcome this problem, a two transistor cell has been employed where one transistor is specifically employed to charge the capacitance of the cell. Such a bipolar memory circuit is disclosed in the Sander et al U.S. Pat. No. 3,898,243. However, because the cell now employs two gates, the area required to implement the cell is increased and the packing density is decreased. In place of the second switching transistor, a switching diode may be employed.
It has been discovered that certain amorphous semiconductor materials are capable of being employed as a threshold device and can be switched from a high resistance state to a low resistance state. Particular materials that may be employed are disclosed in the Ovshinsky U.S. Pat. No. 3,271,591, the Dewald et al U.S. Pat. No. 3,241,009, and the Neale U.S. Pat. No. 3,699,543 and the Buckley U.S. Pat. No. 3,886,577.
A particular type of amorphous semiconductor material is the tellurium based chalcogenide class of materials which have a general formula: EQU Ge.sub.A Te.sub.B X.sub.C Y.sub.D
The X constituent may be antimony, bismuth or arsenic, while the Y constituent may be sulfur or selenium.
Such amorphous high resistance semiconductor material can be placed between a pair of spaced apart electrodes such that the application to one of those electrodes of a voltage pulse, about a given threshold, switches the device to its low resistance state. Such materials can be employed to build a switching device structure on top of the silicon wafer in which the bipolar device structure is fabricated with its collector base capacitance. This should reduce the area required for memory cell and increase its packing density.
It is then an object of the present invention to provide an improved single transistor memory cell.
It is another object of the present invention to provide an improved single transistor memory cell having reduced area requirements and higher packing density.
It is still another object of the present invention to provide a single transistor memory cell employing an amorphous semiconductor threshold device for employment in charging the base-collector capacitance of the transistor, which combination may be fabricated in a layered structure so as to reduce the memory area requirements.